Over the years, arm has improved ISA and made various updates and extensions to the architecture. The company said that the V9 architecture aims to provide stronger algorithm support for mobile devices, computers and servers. In the next two chip iterations, the armv9 architecture will bring a 30% performance improvement.

It has been nearly a decade since arm first announced the armv8 architecture in October 2011, which is a considerable decade. Because the instruction set architecture is increasingly widely used in mobile space and server space, it has begun to popularize. Consumer device markets, such as laptops and upcoming desktops.

Recently, as part of arm's vision day activity, the company announced the first details of the company's new armv9 architecture, laying the foundation for arm's hope to become the next 300 billion chip computing platform in the next decade.

Simon segars, chief executive of arm, said: 'When we look forward to the future defined by artificial intelligence, we must lay a leading Computing Foundation and prepare for the unique challenges in the future. Armv9 is the answer. It will become the forefront of the next 300 billion arm chips, driven by universal specialization and security based on the economy, design freedom and availability of universal computing And strong processing requirements.

Three focuses of armv9 architecture

The new armv9 architecture has three focuses, namely AI, vector and DSP performance improvement and security. In terms of specific details, the armv9 architecture follows the aarch64 benchmark instruction set and adds some very important extensions in terms of functions, so as to ensure that arm company increases the architecture number and re benchmark the software level according to the new features of V9 architecture and various V8 architecture extensions released over the years.

The new armv9 architecture mainly focuses on three aspects: AI, vector and DSP performance improvement and security.

First, let's look at DSP and AI performance.

Extended vector processing for DSP, ML, and XR workloads.

For developers and users, the most significant feature of the new armv9 compatible CPU is to take scalable vector extension 2 (sve2) as a new benchmark after arm Neon Technology. Released in April 2019, sve2 aims to accelerate high-performance computing and has great gain in processing machine learning (ML) task loads such as 5g, virtual reality (VR) and augmented reality (AR), as well as image and speech recognition.

Arm believes that ML workloads will become more and more common in the next few years. Accordingly, any performance or power centric device needs to run ml workloads on a dedicated accelerator, but most of them still choose to use a smaller range of ML workloads running on the CPU.

Arm said that by the middle of the 21st century, there will be more than 8 billion voice auxiliary devices, and 90% of applications will contain AI elements. Arm cooperated with Fujitsu to create scalable vector extension (SVE). Now, sve2 is part of armv9 for better machine learning and digital signal processing.

Matrix multiplication instruction is the key. It is an important step that is widely used as a benchmark feature of armv9 CPU.

Security

In terms of security, armv9 will obtain arm confidential compute architecture (CCA) to shield data access and protect data at the hardware level. In addition, there will be something called realms that applications can use outside secure and non secure areas.

Arm hopes to solve the security problem through a new secure computing architecture (CCA). Therefore, arm introduces a new concept - domains, which can be regarded as a secure container execution environment completely opaque to the operating system (OS) or hypervisor. Although the hypervisor still exists, it is only responsible for resource scheduling and task allocation.

Machine learning is also seen as an important part of armv9 because arm believes that more and more ml workloads will become commonplace in the next few years. Of course, anything that is critical to performance or power efficiency still needs to run ml workloads on dedicated accelerators, but there will still be a large number of smaller ml workloads running on CPUs.

The matrix multiplication instruction is the key here. It will represent an important step towards wider adoption in the ecosystem as the basic function of V9 CPU.